(The polynomial theory which scramblers are based on is beyond the scope of this post, for those who want to deepen, google offers a lot of documentation
about it. The aim is just to show their operation and the results obtained
by manipulating an incoming stream of data with a scrambler, say a little introduction to this topic.)
In
telecommunications a scrambler, also referred to as a randomizer, is a
block that manipulates a data stream before transmitting. The
manipulations are reversed by a descrambler at the receiving side. A
scrambler can be placed just before a FEC coder, or it can be placed
after the FEC, just before the modulator to give the transmitted data
useful engineering properties as to reduce the length of consecutive 0s
or 1s [1] (long sequences of 0s or 1s can cause transmission synchronization
problems at receive modem).
In brief, scramblers are often constructed using
linear-feedback shift registers (LFSRs) which consist of clocked storage
elements (say "registers") and a feedback network and are defined
similarly by a polynomial: the number N of registers gives the degree of
the polynomial, the "taps" in the feedback network are modulo-2 additions (equivalent to exclusive-OR, or XOR) and give the used monomial with their relative degree. The registers are initially pre-loaded to the 0 state. The schematic in Figure 1 shows the so-called multiplicative (or "self-synchronizing") scrambler.
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Fig. 1 - scrambler/descrambler schematic |
As example, the schematic in Figure 2 shows a x^8+x^5+x+1 scrambler (for simplicity the connections between the registers are not indicated).
|
Fig. 2 - x^8 + x^5 +x + 1 scrambler |
That
said, removing the scrambler from a demodulated
stream (if scrambled), offers some more chances to understand the original data format and allows to take a step forward in signals analysis. That's why I coded some functions in LUA to study
the operation of scramblers and the examples I post here refer to the scrambler described by the plynomial x^10+x+1 and depicted in Figure 3
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